Atharva Prashant Kale

Graduate student in Internet of Things at Northeastern University. I engineer resilient systems where hardware logic, network packets, and physical machinery converge. My technical experience ranges from designing silicon-level security primitives on FPGAs to validating large-scale facility control networks for MassDOT. I specialize in bridging the gap between legacy hardware and modern automation, deploying fault-tolerant systems in highly regulated, safety-critical environments.

Technical Skills

Network Engineering

TCP/IP, DNS, DHCP, Routing/Switching, EtherNet/IP, DLR, Fiber Optic Troubleshooting

Embedded & Firmware

C, C++, Python, Verilog, VHDL, FreeRTOS, ESP32, FPGA (Tang Nano/Xilinx)

Industrial Automation

Studio 5000 (Allen-Bradley), Stratix Switches, SCADA, PLC Ladder Logic, Modbus

Hardware Diagnostics

Megger ADX6 (Motor Testing), Oscilloscope, Logic Analyzer, PCB Design (Altium)

Protocols

MQTT, CoAP, SPI, I2C, UART, PROFINET, ControlNet

Projects

Hardware Security

Ring Oscillator PUF on FPGA

Validated bit stability against voltage and temperature fluctuations by designing a hardware security primitive (PUF) on an FPGA using Verilog. Developed MATLAB automation scripts for test response collection to achieve 85% entropy.

Embedded Systems

Landmine Detection Robot

Built a terrain-capable robot using an LPC2148 microcontroller to detect metallic landmines and report GPS coordinates via GSM.

Automotive Integration

Formula SAE BSPD and Wiring Harness

Validated PCBA signal integrity by designing a fail-safe Brake System Plausibility Device (BSPD) and executing Hardware-in-the-Loop (HIL) testing to simulate high-vibration automotive conditions.

Experience

Highway Engineering Co-op (M/E/C Building Systems)

MassDOT · Boston, MA (Jan 2026 - Present)

Ensured 100% facility safety compliance prior to Lower Explosive Limit (LEL) thresholds by executing field-level validation protocols and replacing failed infrared sensors across the District 6 automated gas detection network.
Validated physical-to-digital signal interpretation by mapping 4-20mA analog outputs from sensors to automated facility control logic.
Maintained ring redundancy while preserving a 4-port fiber output capacity by calculating exact port density and topology requirements for facility control systems.

Hardware and Network Engineering Intern

Broad Net India Pvt. Ltd. · Mumbai

Analyzed Linux kernel logs and TCP/IP packet loss metrics to resolve edge device routing failures, optimizing throughput for commercial clients.
Validated physical layer integrity to meet strict ISP standards by calibrating and testing fiber-optic signal strength using optical power meters.

Electronics Head

Hyperion Racing · Formula SAE

Led the electronics subsystem for an electric racecar, validating PCBA signal integrity through the design of a fail-safe Brake System Plausibility Device and executing Hardware-in-the-Loop (HIL) endurance testing.